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TIE-50406 DSP Implementations - 15.12.2016

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TIE-50406 DSP Implementations

Jarmo Takala

Exam Dec. 15, 2016

Calculators and dictionaries are allowed

1. Explain shortly:
a) recursive DFG
b) M-level pipelined system
c) Biased exponent
d) SDFG
€) L-slow
f) precedence constraint in data flow graphs

2. Consider the wave digital filter shown below. Assume that each multiply
operation reguires 20 ns and each add operation reguires 8 ns.

 

 

 

 

 

 

a) Calculate the iteration bound of this filter by inspection. —
b) Whatis the critical path?

c) Manually pipeline and/or retime this filter to achieve a critical path egual to the

iteration bound.

3. Draw the systolic architecture block diagram and the space-time mapping for
the 3-tap FIR digital filter (dependence graph below) with the projection,
processor, and scheduling vectors as follows:

a=(*). P=G1 =C n.
Dependency Graph

 

J xo 1 3 4 X %
N
= KN.
a |

16) b
0

0342-00 - - - - -()—a

 

 

4. Consider the synchronous dataflow graph Gi below:
 

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a) Determine the topology matrix T of Gi

b) Acguire the repetition vector g by solving T'g" = O or by balance eguations.

c) Construct a valid and periodic seguential schedule S for G1. For S to be periodic,
which edge(s) need initial tokens, and how many of them? Make your schedule start
with the firing of A.

d) Execute schedule S for graph G1. Considering edges BA, AA, AD, DC, CD, whatis
the highest number of tokens you observe on any single edge during the execution
of S?

 


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